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Mission Statement

Interpret and implement Moore’s Law to include all aspects of heterogeneous systems and develop architectures, methodologies, designs, components, materials and manufacturable integration schemes, that will shrink system footprint and improve power and performance.

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News


IEEE 68th Electronic Components and Technology Conference Best Student Paper Award

Siva Chandra Jangam (Advisor: Prof. Subramanian Iyer, UCLA Center for Integration and Performance Scaling (CHIPS)) won the ECTC Best Student Paper Award for the paper titled “Latency, Bandwidth and Power Benefits of the SuperCHIPS Integration Scheme” at the 2018 IEEE 68th Electronic Components and Technology Conference held in San Diego,...

Prof. Subramanian S. Iyer and Prof. Alan N. Willson, Jr. have awarded to the rank of NAI Fellows.

The 2017 National Academy of Inventors (NAI) Fellows Selection Committee and Board of Directors have awarded Dr. Subramanian S. Iyer and Dr. Alan N. Willson, Jr., of the Electrical & Computer Engineering Department, to the rank of NAI Fellows, the nominations of which were submitted by Dr. Asad M. Madni....

Packageless processors; improving AI accuracy; superconductivity rules. BY: ANN STEFFORA MUTSCHLER

Demand for increasing performance is far outpacing the capability of traditional methods for performance scaling. Disruptive solutions are needed to advance beyond incremental improvements. Traditionally, processors reside inside packages to enable PCB-based integration. However, a team of researchers from the Department of Electrical and Computer Engineering from the University of...

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Conferences


2018 UCLA CHIPS IAB Meeting November 1, 2018

UCLA Electrical and Computer Engineering Department

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